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New Approach to Look-Up-Table Design and Memory-Based Realization of FIR Digital Filter

机译:FIR数字滤波器查找表设计的新方法和基于存储器的实现

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Distributed arithmetic (DA)-based computation is popular for its potential for efficient memory-based implementation of finite impulse response (FIR) filter where the filter outputs are computed as inner-product of input-sample vectors and filter-coefficient vector. In this paper, however, we show that the look-up-table (LUT)-multiplier-based approach, where the memory elements store all the possible values of products of the filter coefficients could be an area-efficient alternative to DA-based design of FIR filter with the same throughput of implementation. By operand and inner-product decompositions, respectively, we have designed the conventional LUT-multiplier-based and DA-based structures for FIR filter of equivalent throughput, where the LUT-multiplier-based design involves nearly the same memory and the same number of adders, and less number of input register at the cost of slightly higher adder-widths than the other. Moreover, we present two new approaches to LUT-based multiplication, which could be used to reduce the memory size to half of the conventional LUT-based multiplication. Besides, we present a modified transposed form FIR filter, where a single segmented memory-core with only one pair of decoders are used to minimize the combinational area. The proposed LUT-based FIR filter is found to involve nearly half the memory-space and $(1/N)$ times the complexity of decoders and input-registers, at the cost of marginal increase in the width of the adders, and additional $sim(4Ntimes W)$ AND-OR-INVERT gates and $sim(2Ntimes W)$ NOR gates. We have synthesized the DA-based design and LUT-multiplier based design of 16-tap FIR filters by Synopsys Design Compiler using TSMC 90 nm library, and find that the proposed LUT-multiplier-based design involves ne-narly 15% less area than the DA-based design for the same throughput and lower latency of implementation.
机译:基于分布式算术(DA)的计算因其在有限脉冲响应(FIR)滤波器的基于内存的高效实现方式中的潜力而广受欢迎,其中,滤波器输出作为输入样本矢量和滤波器系数矢量的内积进行计算。但是,在本文中,我们证明了基于查找表(LUT)乘数的方法(其中存储元件存储滤波器系数乘积的所有可能值)可能是基于DA的面积有效替代方法。具有相同实现吞吐量的FIR滤波器设计。分别通过操作数分解和内积分解,我们为等效吞吐量的FIR滤波器设计了常规的基于LUT乘数和基于DA的结构,其中基于LUT乘数的设计涉及几乎相同的内存和相同数量的FIR滤波器。加法器和较少的输入寄存器,其代价是加法器宽度比其他寄存器稍高。此外,我们提出了两种新的基于LUT乘法的方法,这些方法可用于将存储器大小减小到传统基于LUT乘法的一半。此外,我们提出了一种改进的转置形式FIR滤波器,其中仅使用一对解码器的单个分段存储核被用于最小化组合面积。发现基于提议的基于LUT的FIR滤波器涉及几乎一半的存储空间和$(1 / N)$倍的解码器和输入寄存器的复杂度,但以加法器宽度的边际增加为代价。 $ sim(4Ntimes W)$ AND-OR-INVERT门和$ sim(2Ntimes W)$ NOR门。我们使用台积电(TSMC)90 nm库,通过Synopsys Design Compiler综合了基于DA的16抽头FIR滤波器的设计和基于LUT乘数的设计,发现拟议的基于LUT乘数的设计所占面积比以前少了15%基于DA的设计,以实现相同的吞吐量和更低的实施延迟。

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