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A Programmable and Configurable ASIC to Generate Piecewise-Affine Functions Defined Over General Partitions

机译:一种可编程和可配置的ASIC,用于生成在常规分区上定义的分段仿射函数

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This paper presents a programmable and configurable architecture and its inclusion in an Application Specific Integrated Circuit (ASIC) to generate Piecewise-Affine (PWA) functions. A Generic PWA form (PWAG) has been selected for integration, because of its suitability to implement any PWA function without resorting to approximation. The design of the ASIC in a 90 nm TSMC technology, its integration, test and characterization through different examples are detailed in the paper. Furthermore, the ASIC verification using an ASIC-in-the-loop methodology for embedded control applications is presented. To assess the characteristics of this verification, the double-integrator, a usual control application example has been considered. Experimental results validate the proposed architecture and the ASIC implementation.
机译:本文提出了一种可编程和可配置的体系结构,并将其包含在专用集成电路(ASIC)中以生成分段仿射(PWA)功能。已选择通用PWA表单(PWAG)进行集成,因为它适合于实现任何PWA功能而无需求助于近似值。本文详细介绍了采用90 nm TSMC技术的ASIC的设计,通过不同示例进行的集成,测试和表征。此外,还介绍了针对嵌入式控制应用的使用ASIC回路方法的ASIC验证。为了评估此验证的特征,我们考虑了双积分器(一个常见的控制应用示例)。实验结果验证了所提出的体系结构和ASIC实现。

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