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Noise-Shaped Residue-Discharging Delta-Sigma ADCs With Time-Modulated Pulse Feedback

机译:具有时间调制脉冲反馈的噪声形残留放电Δ-ΣADC

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This paper describes a delta-sigma modulator with a new feedback topology in combination with the recently proposed two-step residue-discharging quantizer. Instead of using a single digital-to-analog converter (DAC) with a large number of levels, a mixed-mode DAC is presented which takes advantage of the two-step nature of the quantizer. Hence, only one feedback DAC, which is associated with the coarse bits (MSBs), is required for the modulator and LSBs are fed back as a time-modulated pulse (TMP). Therefore, high quantization resolution is achieved without increasing the front-end DAC complexity. Additionally, a new data weighted averaging (DWA) technique is proposed which not only suppresses the mismatch between the unit elements of the MSB DAC, but also aims to average out the gain error between the MSB and LSB DACs. Therefore, the possible quantization noise leakage is drastically reduced. Detailed mathematical models as well as comprehensive simulation results are provided to prove the efficiency of the proposed structure.
机译:本文介绍了一种具有新反馈拓扑结构的delta-sigma调制器,以及最近提出的两步残留放电量化器。代替使用具有大量电平的单个数模转换器(DAC),而是提出了一种利用量化器的两步式特性的混合模式DAC。因此,调制器仅需要一个与粗略位(MSB)相关的反馈DAC,并且LSB作为时间调制脉冲(TMP)反馈。因此,可以在不增加前端DAC复杂度的情况下实现高量化分辨率。此外,提出了一种新的数据加权平均(DWA)技术,该技术不仅可以抑制MSB DAC的单元元素之间的失配,而且还可以平均MSB和LSB DAC之间的增益误差。因此,大大降低了可能的量化噪声泄漏。通过详细的数学模型和综合的仿真结果证明了该结构的有效性。

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