首页> 外文期刊>Circuits and Systems I: Regular Papers, IEEE Transactions on >A 73.9%-Efficiency CMOS Rectifier Using a Lower DC Feeding (LDCF) Self-Body-Biasing Technique for Far-Field RF Energy-Harvesting Systems
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A 73.9%-Efficiency CMOS Rectifier Using a Lower DC Feeding (LDCF) Self-Body-Biasing Technique for Far-Field RF Energy-Harvesting Systems

机译:使用较低直流馈电(LDCF)自体偏置技术的73.9%效率CMOS整流器,用于远场RF能量收集系统

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A self-body-biasing technique is proposed for differential-drive cross-coupled (DDCC) rectifier, with its profound application in far-field RF energy-harvesting systems. The conventional source-to-body, and the proposed technique known as Lower DC Feeding (LDCF), were fabricated in the 130-nm CMOS and compared at the operation frequency of 500 MHz, 953 MHz and 2 GHz along with a corresponding load of 2 kQ, 10 kQ and 50 kQ. The technique allows the PMOS transistors to operate with a dynamic threshold voltage (Vth) which improves the power conversion efficiency (PCE) when the rectifier is operating at a smaller received power. A 9.5% of improvement is achieved at the peak PCE when the rectifier is operating at 953 MHz, and driving a 10 kQ load. A maximum PCE of 73.9% is measured at 2 GHz when driving a 2-kQ load. The LDCF technique also offers a self-limiting capability for its output voltage, by reducing the PCE at larger received power. A limit-voltage level of 3.5 V is measured irrespective to the operating frequency and load. This capability aids the protection of the subsequent circuits in a wireless sensor from being overpowered.
机译:提出了一种用于差动驱动交叉耦合(DDCC)整流器的自偏置技术,该技术在远场射频能量收集系统中具有深远的应用。在130-nm CMOS中制造了常规的源到体以及所建议的称为低DC馈电(LDCF)的技术,并在500 MHz,953 MHz和2 GHz的工作频率下以及相应的负载2 kQ,10 kQ和50 kQ。该技术允许PMOS晶体管在动态阈值电压(Vth)下工作,当整流器以较小的接收功率工作时,该阈值电压可提高功率转换效率(PCE)。当整流器工作在953 MHz并驱动10 kQ负载时,在PCE峰值时可实现9.5%的改善。驱动2 kQ负载时,在2 GHz处测得的最大PCE为73.9%。 LDCF技术还通过降低较大接收功率下的PCE,为其输出电压提供了自限能力。不论工作频率和负载如何,都可测量到3.5 V的极限电压电平。此功能有助于保护无线传感器中的后续电路免于过载。

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