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256 $imes$ TDC Array With Cyclic Interpolators Based on Calibration-Free $2{imes}$ Time Amplifier

机译:256 $ times $ 基于免校准的带有循环插值器的TDC阵列 $ 2 { t​​imes $$ 时间放大器

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This paper presents the design of a CMOS time-to-digital converter (TDC) used in a direct time-of-flight laser radar line receiver consisting of an array of single-photon avalanche diodes (SPADs) and 256 TDCs. The TDCs use the Nutt interpolation method, where the start/stop fine interpolators are based on a cyclic converter architecture. The cyclic converters use a delayline-based time interval amplifier to double the quantization residue after each quantization cycle. The time amplifier, and the entire TDC array, does not need any biasing nor does the TDC results need any post-processing to provide sub-100-ps precision and uniformity across the TDC array, therefore making the design very robust and appealing for large designs where hundreds of TDCs are needed on a single chip. Fabricated in a 0.35 mu m CMOS technology, a single TDC channel occupies an area of 0.03 mm(2) and consumes a power of 1.17 mW @ 100 kHz measurement rate. The TDC has a measurement range of 640 ns, and with a resolution of 15 bits, the LSB is 20 ps. Linearity is ensured by the Nutt interpolation method while the rms single-shot precision of the TDC channel is 72 ps. Thus, when LIDAR applications are considered, the TDC is capable of providing a range of 96 m with a precision of 1 cm without any post-processing or calibration.
机译:本文介绍了用于直接飞行时间激光雷达线接收器的CMOS时间数字转换器(TDC)的设计,该接收器由单光子雪崩二极管(SPAD)和256个TDC组成。 TDC使用Nutt插值方法,其中开始/停止精细插值器基于循环转换器架构。循环转换器使用基于延迟线的时间间隔放大器在每个量化周期后将量化残差加倍。时间放大器以及整个TDC阵列不需要任何偏置,TDC结果也不需要任何后处理即可在整个TDC阵列上提供低于100ps的精度和均匀性,因此使设计非常坚固,对于大尺寸设计具有吸引力在单个芯片上需要数百个TDC的设计中。采用0.35μmCMOS技术制造的单个TDC通道占用0.03 mm(2)的面积,在100 kHz测量速率下功耗为1.17 mW。 TDC的测量范围为640 ns,分​​辨率为15位,LSB为20 ps。通过Nutt插值方法可确保线性度,而TDC通道的均方根单脉冲精度为72 ps。因此,在考虑激光雷达应用时,TDC能够提供96 m的范围和1 cm的精度,而无需任何后处理或校准。

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