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Missing-Code-Occurrence Probability Calibration Technique for DAC Nonlinearity With Supply and Reference Circuit Analysis in a SAR ADC

机译:SAR ADC中带有电源和参考电路分析的DAC非线性丢失码出现概率校准技术

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This paper reports a calibration scheme that can be used to correct the inter-stage gain error in two-stage analog-to-digital converters (ADCs). We measure the static nonlinearity at the raw ADC outputs and compensate it through a feedback path to adjust the gain in the analog domain, which avoids the dynamic range loss in the conventional pure digital calibrations. The proposed scheme detects the error via the missing-code-occurrence probability (MCOP), which is insensitive to the comparator offset and has better immunity to its noise. Besides the gain error, we discuss other DAC linearity issues, such as the implementations of the reference buffer and the low-dropout (LDO) regulator. To verify the MCOP calibration, we design a 12-bit successive-approximation-register ADC, employing the bridge-DAC, in 65-nm CMOS. We integrate the ADC operating at 100 MS/s with the MCOP calibration, the reference buffers, and the LDO. The measurement results demonstrate the linearity enhancement after the proposed calibration, where we improve the signal-to-noise-and-distortion ratio to 61.38 dB, leading to a FoM of 16.7 fJ/conversion step at the Nyquist input frequency.
机译:本文报告了一种可用于校正两级模数转换器(ADC)中级间增益误差的校准方案。我们测量原始ADC输出处的静态非线性,并通过反馈路径对其进行补偿,以调整模拟域中的增益,从而避免了传统纯数字校准中的动态范围损失。所提出的方案通过丢失码发生概率(MCOP)检测错误,该错误对比较器偏移不敏感,并且对噪声的抵抗力更好。除了增益误差外,我们还讨论了其他DAC线性度问题,例如参考缓冲器和低压差(LDO)调节器的实现。为了验证MCOP校准,我们设计了一个采用65nm CMOS的桥式DAC的12位逐次逼近寄存器ADC。我们将以100 MS / s的速度运行的ADC与MCOP校准,参考缓冲器和LDO集成在一起。测量结果证明了所提出的校准后的线性度增强,其中我们将信噪比和失真比提高到61.38 dB,从而在奈奎斯特输入频率下的FoM为16.7 fJ /转换步长。

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