首页> 外文期刊>IEEE transactions on circuits and systems . I , Regular papers >X-SRAM: Enabling In-Memory Boolean Computations in CMOS Static Random Access Memories
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X-SRAM: Enabling In-Memory Boolean Computations in CMOS Static Random Access Memories

机译:X-SRAM:在CMOS静态随机访问存储器中启用内存中的布尔计算

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Silicon-based static random access memories (SRAM) and digital Boolean logic have been the workhorse of the state-of-the-art computing platforms. Despite tremendous strides in scaling the ubiquitous metal-oxide-semiconductor transistor, the underlying von-Neumann computing architecture has remained unchanged. The limited throughput and energy-efficiency of the state-of-the-art computing systems, to a large extent, result from the well-known von-Neumann bottleneck. The energy and throughput inefficiency of the von-Neumann machines have been accentuated in recent times due to the present emphasis on data-intensive applications such as artificial intelligence, machine learning, and cryptography. A possible approach towards mitigating the overhead associated with the von-Neumann bottleneck is to enable in-memory Boolean computations. In this paper, we present an augmented version of the conventional SRAM bit-cells, called the X-SRAM, with the ability to perform in-memory, vector Boolean computations, in addition to the usual memory storage operations. We propose at least six different schemes for enabling in-memory vector computations, including NAND, NOR, IMP (implication), XOR logic gates, with respect to different bit-cell topologies - the 8T cell and the 8+T Differential cell. In addition, we also present a novel `read-compute-store' scheme, wherein the computed Boolean function can be directly stored in the memory without the need of latching the data and carrying out a subsequent write operation. The feasibility of the proposed schemes has been verified using the predictive transistor models and detailed Monte-Carlo variation analysis. As an illustration, we also present the efficacy of the proposed in-memory computations by implementing advanced encryption standard algorithm on a non-standard von-Neumann machine wherein the conventional SRAM is replaced by X-SRAM. Our simulations indicated that up to 75% of memory accesses can be saved using the proposed techniques.
机译:基于硅的静态随机存取存储器(SRAM)和数字布尔逻辑一直是最新计算平台的主力军。尽管在扩展无处不在的金属氧化物半导体晶体管方面取得了巨大进步,但底层的von-Neumann计算架构仍保持不变。众所周知,冯·诺依曼瓶颈导致了先进计算系统有限的吞吐量和能源效率。由于目前对诸如人工智能,机器学习和密码学之类的数据密集型应用程序的重视,von-Neumann机器的能源效率和吞吐量效率低下已日趋严重。减轻与von-Neumann瓶颈相关的开销的一种可能方法是启用内存中的布尔计算。在本文中,我们提出了一种称为X-SRAM的常规SRAM位单元的增强版本,除了通常的存储操作外,还可以执行内存中矢量布尔运算。针对不同的位单元拓扑-8T单元和8 n + nT分化细胞。此外,我们还提出了一种新颖的“读-计算-存储”方案,其中可以将计算的布尔函数直接存储在内存中,而无需锁存数据并执行后续的写操作。已使用预测晶体管模型和详细的蒙特卡洛变化分析验证了所提方案的可行性。作为说明,我们还通过在非标准的von-Neumann机器上实施高级加密标准算法来展示所提出的内存计算的功效,其中传统的SRAM被X-SRAM取代。我们的仿真表明,使用建议的技术可以节省多达75%的内存访问。

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