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An Oversampling Stochastic ADC Using VCO-Based Quantizers

机译:使用基于VCO的量化器的过采样随机ADC

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An oversampling stochastic analog-to-digital converter is presented. This stochastic converter spatially averages quantization errors in multiple voltage-controlled oscillator (VCO)-based quantizers. Unlike other stochastic converters, this proposed architecture does not require an inverse Gaussian cumulative density function estimator. The digital adder becomes an ideal estimator due to uncorrelated quantization errors, which can be modeled as a uniformly distributed random variable. Because of the simple open-loop structure, this stochastic converter can easily be synthesized and reconfigured. The proof-of-concept prototype is implemented in a 0.18 μm CMOS process. The prototype employs eight VCO-based quantizers and validates the extra 9 dB signal to quantization noise ratio improvement from quantization error spatial averaging. The measurements further demonstrate 54.2 dB and 45.4 dB SNDR for 50 MHz and 100 MHz bandwidths, while dissipating 116 mW of power.
机译:提出了一种过采样的随机模数转换器。该随机转换器在多个基于电压控制振荡器(VCO)的量化器中对量化误差进行空间平均。与其他随机转换器不同,此提议的体系结构不需要逆高斯累积密度函数估计器。由于不相关的量化误差,数字加法器成为理想的估计器,可以将其建模为均匀分布的随机变量。由于简单的开环结构,该随机转换器可以轻松地进行合成和重新配置。概念验证原型以0.18μmCMOS工艺实现。该原型采用八个基于VCO的量化器,并通过量化误差空间平均来验证额外的9 dB信号与量化噪声比的改善。这些测量进一步证明了在50 MHz和100 MHz带宽下的SNDR为54.2 dB和45.4 dB,同时消耗了116 mW的功率。

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