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Differential Capacitive Readout Circuit Using Oversampling Successive Approximation Technique

机译:使用过采样逐次逼近技术的差分电容读出电路

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This paper designs a close loop Σ-Δ readout circuit for differential MEMS accelerometer. A technique named oversampling successive approximation (OSA) is employed to build basic amplifiers and integrators. This technique can largely reduce the gain error and thus low gain amplifier such as single stage amplifier is allowed to be used. As a result, the power consumption and chip area are reduced. However, the OSA-based amplifiers and integrators are vulnerable to the interference caused by charge injection and leakage current from the specific MOSFET switches. This drawback is analyzed in detail and the interference suppressing solutions are given. The OSA-based readout circuit is fabricated in a commercial 0.18 μm BCD process. The measurement results show that the interference is reduced by 20 dB in the circuit with interference suppressing solutions compared with the circuit without interference suppressing solutions. And the noise floor is 24 μg/rtHz. The readout circuit achieves a 0.07% gain error with a low power consumption of 0.5 mW and 9 MHz sampling rate.
机译:本文设计了一种用于差分MEMS加速度计的闭环Σ-Δ读出电路。采用了一种称为过采样逐次逼近(OSA)的技术来构建基本放大器和积分器。该技术可以大大减小增益误差,因此允许使用低增益放大器,例如单级放大器。结果,减少了功耗和芯片面积。但是,基于OSA的放大器和积分器易受电荷注入和特定MOSFET开关泄漏电流引起的干扰的影响。详细分析了该缺点,并给出了干扰抑制方案。基于OSA的读出电路是采用商用0.18μmBCD工艺制造的。测量结果表明,与没有干扰抑制方案的电路相比,采用干扰抑制方案的电路中的干扰降低了20 dB。本底噪声为24μg/ rtHz。读出电路以0.5 mW的低功耗和9 MHz的采样率实现了0.07%的增益误差。

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