Variable-Gain, Low-Noise Amplification for Sampling Front Ends

摘要

This paper presents a low-noise front-end amplifier with configurable gain, targeting the recording of small signals, such as the electrocardiogram (ECG) or electroneurogram (ENG). The circuit consists of a continuous-time input stage using lateral bipolar transistors realized in complementary metal–oxide semiconductor (CMOS) technology followed by a switched-capacitor integrating stage. The voltage gain is adjustable by varying the phase delay between two system clocks. Simulated and measured results for a chip fabricated in 0.35-$mu$m CMOS technology are reported. The amplifier occupies an active area of 0.064 mm $^{2}$, yields a nominal gain of 630 V/V with more than a 50-dB tuning range, less than 16 ${rm nV}_{rm rms}/surd{rm Hz}$ input noise and a common-mode rejection of more than 97 dB. Its power consumption is 280 $mu$W with a $pm$1.5-V supply.