A 114-dB 68-mW Chopper-Stabilized Stereo Multibit Audio ADC in 5.62 mm{sup}2

摘要

A multibit delta-sigma audio stereo analog-to-digital converter has been developed. It employs a fifth-order single-loop 17-level delta-sigma modulator with an input feedforward gain stage. A second-order mismatch shaping (DEM) circuit is utilized to remove tones and nonlinearities caused by capacitor mismatch of the feedback digital-to-analog converter. The implementation of the DEM block introduces minimum latency into the delta-sigma feedback loop. Chopper stabilization is applied to the first integrator to eliminate the 1/f noise. The converter achieves 114-dB dynamic range and - 105-dB total harmonic distortion over the 20-kHz audio band. This single chip includes stereo analog modulators, bandgap reference, serial interface, and a two-stage decimation filter, occupies 5.62-mm{sup}2 active area in a 0.35-μm double-poly, three-metal CMOS process and dissipates only 55-mW power in the analog circuits.