机译:公平和缓存阻止了GPU上的并发内核执行的意识扭曲调度
School of Computer Northwestern Polytechnical University Xi'an China;
School of Computer Northwestern Polytechnical University Xi'an China;
School of Computer Northwestern Polytechnical University Xi'an China;
Institute of Artificial Intelligence and Robotics Xi'an Jiaotong University Xi'an China;
Department of Electrical and Computer Engineering North Carolina State University Raleigh USA;
GPU; Concurrent kernels; Warp scheduling; Cache blocking; Interference;
机译:研究GPU上的Warp散度感知执行
机译:CAWA:协调的翘曲调度和缓存优先级,用于GPGPU工作负载的关键翘曲加速
机译:将NVIDIA GPU线程块调度程序的展示位置策略搅拌,用于并发内核
机译:具有并发GPGPU内核的在线结构运行时预测的抢占式线程块调度
机译:GPU上阻塞和非阻塞并发队列的性能评估
机译:CaLRS:GPGPU上的关键感知共享LLC请求调度算法
机译:用于公平和高效执行并发GPGPU应用程序的应用程序感知内存系统