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A novel programming technique for highly scalable and disturbance immune flash EEPROM

机译:高可扩展性和抗干扰性闪存EEPROM的新颖编程技术

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摘要

The program speed of a selected cell and the program disturbance of unselected cells sharing the common program- line in split-gate source-side injected flash memory has been investigated. It is found that the program disturbance becomes severe as the control gate length decreases. In this letter, we first propose a novel program technique by applying a negative bias to inhibited word-line to improve the trade-of T between program speed and program distur- bance. The experimental results indicate that the new program technique is a good candidate for future high-density, high-disturbance-immunity flash EEPROM memory applications.
机译:已经研究了在分离门源极侧注入的闪存中共享公共程序行的选定单元的编程速度和未选定单元的编程干扰。已经发现,随着控制栅长度的减小,编程干扰变得严重。在这封信中,我们首先提出一种新颖的编程技术,该方法是通过对被抑制的字线施加负偏压来提高程序速度与程序干扰之间的折衷。实验结果表明,新的编程技术非常适合未来的高密度,高抗干扰性的快闪EEPROM存储应用。

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