Fully-Automated and Portable Design Methodology for Optimal Sizing of Energy-Efficient CMOS Voltage Rectifiers

摘要

This paper presents a specific, fully-automated and portable design methodology used to optimize implementations of AC–DC rectifiers using MOS diodes. Output voltage and efficiency are theoretically analyzed taking into account influences of devices DC and AC characteristics, input signal voltages and frequencies as well as load currents, temperatures, backgate voltages and even capacitors and diodes parasitic capacitances. An experimental voltage multiplier is designed in a 1 $mu$ m multiple-threshold voltage SOI CMOS technology for ultra low power applications at 13.56 MHz .