Scanning acoustic microscopy analyses 3D chip packages in the Z-dimension

摘要

The concept behind advanced 3D chip packaging is to stack multiple dies or wafers in a vertical direction - or Z-dimension - to achieve better performance with lower power and cost, and smaller size. However, as 3D packages become increasingly complex, so do the challenges in identifying defects in multiple layers of stacked dies, silicon interposers and interconnections such as through-silicon vias (TSVs) and fine-pitch micro-bumps. With restricted access to internal components and a need to scan multiple, stacked layers, the focus is now shifting to methods of non-destructive testing, both in manufacturing and for failure analysis.