Integration of low permittivity dielectric in Al dual damascene architecture for low parasitic on-chip interconnect applications

摘要

A low dielectric constant (low-/spl kappa/) material has been successfully integrated in an Al dual damascene interconnect architecture where the low-/spl kappa/ dielectric (/spl kappa/>3) was used as the intra/inter level dielectric (ILD). In addition to a reduction in intra-level and inter-level capacitance, low via resistance, excellent electrical isolation, and good reliability characteristics were observed.