High-κ gate dielectrics with ultra-low leakage current for sub-45 nm CMOS

摘要

The results of a new method of high-κ dielectric formation are reported. For effective oxide thickness of 0.39 nm, the leakage current density of metal-high-κ-silicon structure is about 1 × 10~(-12) A/cm~2 for gate voltage from +3 to —3 V. The descriptive statistics and process variation data presented demonstrate that the process is robust and manufacturing tools can be developed without any fundamental barrier.