首页> 外文期刊>IEEE Transactions on Electron Devices >New Ti-SALICIDE process using Sb and Ge preamorphization for sub-0.2 /spl mu/m CMOS technology
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New Ti-SALICIDE process using Sb and Ge preamorphization for sub-0.2 /spl mu/m CMOS technology

机译:使用Sb和Ge预非晶化的新Ti-SALICIDE工艺用于0.2 / spl mu / m CMOS技术

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摘要

A new process for thin titanium self-aligned silicide (Ti-SALICIDE) on narrow n/sup +/ poly-Si lines and n/sup +/ diffusion layers using preamorphization implantation (PAI) with heavy ions of antimony (Sb) and germanium (Ge) has been demonstrated for application to 0.2-/spl mu/m CMOS devices and beyond. Preamorphization enhances the phase transformation from C/sub 49/Ti/sub x/Si/sub x/ to C/sub 54/TiSi/sub 2/ and lowers the transformation temperature by 80/spl deg/C so that it occurs before conglomeration in narrow lines. Preamorphization by Sb and Ge implantation yields better results than that by As. The sheet resistance of TiSi/sub 2/ on heavily As doped poly-Si lines are 3.7 /spl Omega///spl square/ and 3.8 /spl Omega///spl square/ for the samples preamorphized by Ge and Sb implantations even with line width down to 0.2 /spl mu/m. There is less leakage in the Ti-SALICIDE diode with preamorphization than without it. The probable reasons and mechanisms are discussed.
机译:使用预重注入(PAI)和重锑(Sb)和锗离子对窄n / sup + /多晶硅线和n / sup + /扩散层上的薄钛自对准硅化物(Ti-SALICIDE)的新工艺(Ge)已被证明可用于0.2- / spl mu / m CMOS器件及以后的器件。预非晶化可增强从C / sub 49 / Ti / sub x / Si / sub x /到C / sub 54 / TiSi / sub 2 /的相变,并将相变温度降低80 / spl deg / C,使其发生在团聚之前在狭窄的线。通过Sb和Ge注入进行的预非晶化比通过As产生的结果更好。对于Ge和Sb注入预非晶化的样品,重掺杂As的多晶硅线上的TiSi / sub 2 /的薄层电阻分别为3.7 / spl Omega /// spl square /和3.8 / spl Omega /// spl square /线宽降至0.2 / spl mu / m。经过预非晶化处理的Ti-SALICIDE二极管的漏电流要比没有预漏化的二极管少。讨论了可能的原因和机制。

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