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Nickel Germanesilicide Contacts Formed on Heavily Boron Doped Si{sub}(1-x)Ge{sub}x Source/Drain Junctions for Nanoscale CMOS

机译:在重掺杂硼的Si {sub}(1-x)Ge {sub} x源/漏结上形成用于纳米级CMOS的镍锗硅化物触点

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Formation of source/drain junctions with a small parasitic series resistance is one of the key challenges for CMOS technology nodes beyond 100 nm. A new source/drain technology based on selective deposition of heavily in situ doped Si{sub}(1-x)Ge{sub}x layers was recently developed in this laboratory. This paper presents formation and structural characterization of self-aligned nickel ger-nianosilicide contacts formed on heavily boron doped Si{sub}(1-x)Ge{sub}x alloys. The results show that thin NiSi{sub}(1-x)Ge{sub}x contacts with a resistivity of ~25 /μΩ-cm can be formed on Si{sub}(1-x)Ge{sub}x alloys at temperatures as low as 350℃. However, the low resistivity and the structural integrity of the NiSi{sub}(1-x)Ge{sub}x films can be maintained up to a maximum temperature of 450℃. At higher temperatures, Ge out-diffusion from NiSi{sub}(1-x)Ge{sub}x grains results in interface roughening and NiSi spikes. If the maximum processing temperature is kept within 400℃, p{sup}+ - n junctions with excellent leakage behavior can be formed. A minimum contact resistivity of 2 × 10{sup}(-8) Ω-cm{sup}2 is demonstrated for Ge concentrations above ~40%, which can be linked to the smaller semiconductor bandgap and high boron activation under the metal contact. The results suggest that NiSi{sub}(1-x)Ge{sub}x contacts formed on Si{sub}(1-x)Ge{sub}x junctions have the potential to satisfy the contact resistivity requirements of future CMOS technology nodes.
机译:对于100 nm以上的CMOS技术节点而言,形成具有小寄生串联电阻的源/漏结是关键挑战之一。最近在该实验室中开发了一种基于选择性沉积重掺杂Si {sub}(1-x)Ge {sub} x层的新型源/漏技术。本文介绍了在重硼掺杂的Si {sub}(1-x)Ge {sub} x合金上形成的自对准Ni ger-nianosilicide触头的形成和结构特征。结果表明,在Si {sub}(1-x)Ge {sub} x合金上,可以形成电阻率为〜25 /μΩ-cm的薄NiSi {sub}(1-x)Ge {sub} x触头。温度低至350℃。然而,NiSi {sub}(1-x)Ge {sub} x薄膜的低电阻率和结构完整性可以维持在最高温度450℃。在更高的温度下,Ge从NiSi {sub}(1-x)Ge {sub} x晶粒中向外扩散会导致界面粗糙和NiSi尖峰。如果最高处理温度保持在400℃以内,则可以形成具有优异泄漏性能的p {sup} +-n结。当Ge浓度高于〜40%时,其最小接触电阻率为2×10 {sup}(-8)Ω-cm{sup} 2,这可能与较小的半导体带隙和金属接触下的高硼活化有关。结果表明,在Si {sub}(1-x)Ge {sub} x结上形成的NiSi {sub}(1-x)Ge {sub} x接触有潜力满足未来CMOS技术节点的接触电阻率要求。

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