On the Variability in Planar FDSOI Technology: From MOSFETs to SRAM Cells

摘要

In this paper, an in-depth variability analysis, i.e., from the threshold voltage $V_{T}$ of metal–oxide–semiconductor field-effect-transistors (MOSFETs) to the static noise margin (SNM) of static random-access memory (SRAM) cells, is presented in fully depleted silicon-on-insulator (FDSOI) technology. The local $V_{T}$ variability $sigma_{V_{T}}$ lower than $A_{V_{T}} = hbox{1.4} hbox{mV}cdotmuhbox{m}$ is demonstrated. We investigated how this good $V_{T}$ variability is reported on the SNM fluctuations $sigma_{rm SNM}$ at the SRAM circuit level. It is found experimentally that $sigma_{rm SNM}$ is correlated directly to the $sigma_{V_{T}}$ of SRAM transistors without any impact of the mean SNM value. The contributions of the individual MOSFETs in the SRAM cells have been determined quantitatively by using a homemade Simulation Program with Integrated Circuit Emphasis compact model calibrated on our FDSOI electrical characteristics. The $V_{T}$ variability in n-channel MOSFETs (nMOSFETs) is more critical than that in p-channel MOSFETs for SNM fluctuations, and $sigma_{V_{T}}$ in drive nMOSFETs is the key parameter to control for minimizing $sigma_{rm SNM}$.