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Design and Optimization of Superjunction Collectors for Use in High-Speed SiGe HBTs

机译:用于高速SiGe HBT的超结集电极的设计和优化

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After reviewing the various mechanisms causing breakdown in bipolar transistors, we present a novel collector design for silicon–germanium heterojunction bipolar transistors (SiGe HBTs). The design improves the well-known speed/breakdown voltage tradeoff in SiGe HBTs for radio-frequency (RF) and millimeter-wave applications. Applying multiple alternating p- and n-type layers (a superjunction) deep in the collector–base (CB) space-charge region (SCR) alters the electric field and electron temperature in the CB junction. Consequently, impact ionization is suppressed, whereas the width of the CB SCR is not increased, and therefore, the breakdown voltages $hbox{BV}_{rm CEO}$ and $hbox{BV}_{rm CBO}$ are increased, with no degradation in the device speed or RF performance. For a fixed alternating-current performance, $hbox{BV}_{rm CEO}$ is improved by 0.33 V, producing a SiGe HBT with $f_{T} = hbox{101} hbox{GHz}$, $f_{max} = hbox{351} hbox{GHz}$, and $hbox{BV}_{rm CEO} = hbox{3.0} hbox{V}$, as predicted by calibrated DESSIS technology computer-aided design simulations. Concerns with regard to the influence of thermal cycles associated with fabrication are considered, and a more practical doping profile is proposed to simplify the use of superjunctions. The proposed structure is also contrasted with other approaches from the literature.
机译:在回顾了导致双极晶体管击穿的各种机制之后,我们提出了一种新颖的集电极设计,用于硅锗异质结双极晶体管(SiGe HBT)。该设计改善了用于射频(RF)和毫米波应用的SiGe HBT中众所周知的速度/击穿电压折衷。在集电极-基极(CB)空间电荷区(SCR)的深处施加多个交替的p型和n型层(超结),会改变CB结中的电场和电子温度。因此,冲击电离得到抑制,而CB SCR的宽度没有增加,因此击穿电压$ hbox {BV} _ {rm CEO} $和$ hbox {BV} _ {rm CBO} $增加,不会降低设备速度或射频性能。为了获得固定的交流电性能,将$ hbox {BV} _ {rm CEO} $提高了0.33 V,从而产生了SiGe HBT,其具有$ f_ {T} = hbox {101} hbox {GHz} $,$ f_ {max } = hbox {351} hbox {GHz} $,和$ hbox {BV} _ {rm CEO} = hbox {3.0} hbox {V} $,这是由经过校准的DESSIS技术计算机辅助设计仿真所预测的。考虑到与制造相关的热循环的影响,并提出了更实用的掺杂分布以简化超结的使用。所提出的结构也与文献中的其他方法形成对比。

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