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N-Channel Dual-Workfunction-Gate MOSFET for Analog Circuit Applications

机译:适用于模拟电路应用的N沟道双功函数门MOSFET

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摘要

Analog behaviors of n-channel metal–oxide–semiconductor field-effect transistors (MOSFETs) with dual-workfunction-gate (DWFG) structure are presented. The gate of the n-channel DWFG MOSFET is composed of $hbox{p}^{+}$ and $ hbox{n}^{+}$ poly-Si along the channel carrier flowing direction. To investigate the impact of the proportional length of p- and n-type-doped poly-Si on analog behaviors, they are varied within a total physical gate length of 1.0 $muhbox{m}$. Various dc characteristics that directly affect analog circuit performances are evaluated from the fabricated devices: $I$–$V$ characteristics, drain-induced barrier lowering, transconductance $(g_{m})$, drain conductance $(g_{rm ds} = hbox{1}/r_{rm out})$, intrinsic gain $(A_{V} = g_{m}/g_{rm ds})$, and Early voltage $(V_{rm EA} = I_{D}/g_{rm ds})$. From the measurements, the DWFG devices always show improved characteristics over conventional devices ($ hbox{n}^{+}$-doped poly-Si gate). The DWFG device with the shortest $hbox{p}^{+}$ poly-Si gate length $(p = hbox{0.4/0.6})$ shows better $g_{m}$ characteristics than other D- FG devices. The $g_{rm ds}$ characteristics of the fabricated DWFG devices are improved as the length of the $hbox{p}^{+}$ poly-Si increases. The best $A_{V}$ and $V_{rm EA}$ are taken from the device with a p-type-doped poly-Si length of 0.7 $muhbox{m}$ $(p = hbox{0.7/0.3})$.
机译:介绍了具有双功函数栅极(DWFG)结构的n沟道金属氧化物半导体场效应晶体管(MOSFET)的模拟行为。 n沟道DWFG MOSFET的栅极沿沟道载流子流动方向由$ hbox {p} ^ {+} $和$ hbox {n} ^ {+} $多晶硅组成。为了研究p型和n型掺杂的多晶硅的比例长度对模拟行为的影响,它们在总的物理门长度为1.0μhbox{m} $内变化。从制造的器件中评估了直接影响模拟电路性能的各种直流特性:$ I $ – $ V $特性,漏极引起的势垒降低,跨导$(g_ {m})$,漏极电导$(g_ {rm ds} = hbox {1} / r_ {rm out})$,固有增益$(A_ {V} = g_ {m} / g_ {rm ds})$和早期电压$(V_ {rm EA} = I_ {D } / g_ {rm ds})$。通过测量,DWFG器件始终显示出优于传统器件(掺杂$ hbox {n} ^ {+} $的多晶硅栅)的改进特性。 $ hbox {p} ^ {+} $多晶硅栅极长度为$(p / n = hbox {0.4 / 0.6})$的DWFG器件具有比其他D-FG器件更好的$ g_ {m} $特性。随着$ hbox {p} ^ {+} $多晶硅长度的增加,制造的DWFG器件的$ g_ {rm ds} $特性得到改善。最好的$ A_ {V} $和$ V_ {rm EA} $取自具有p型掺杂的多晶硅长度为0.7的器件$ muhbox {m} $ $(p / n = hbox {0.7 / 0.3})$。

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