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首页> 外文期刊>IEEE Transactions on Electron Devices >Enhancement-Mode GaN-Based High-Electron Mobility Transistors on the Si Substrate With a P-Type GaN Cap Layer
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Enhancement-Mode GaN-Based High-Electron Mobility Transistors on the Si Substrate With a P-Type GaN Cap Layer

机译:具有P型GaN盖层的Si衬底上基于增强模式GaN的高电子迁移率晶体管

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An enhancement-mode (E-mode) high-electron mobility transistor (HEMT) was demonstrated by inserting a p-type GaN layer underneath the gate electrode. The effects of process flows and device structures on the electrical properties are investigated in this paper. We demonstrated a threshold voltage $(V_{rm{th}})$ of 4.3 V by adjusting the built-in voltage of the diode formed between the p-GaN and channel by the alloy temperature. Next, we found the existence of parallel conduction paths of the p-GaN layer and 2-D electron gas (2DEG) channel in such a HEMT structure. By removing p-GaN above the gate–source and gate–drain regions, current conduction migrates from p-GaN to 2DEG channel. The process window of the p-GaN residual thickness to ensure a steady forward current–voltage operation was estimated to be $10pm 5~{rm nm}$ in our case. Finally, with the p-GaN underneath the gate contact to deplete surface leakage current, an E-mode HEMT with a breakdown voltage $(V_{rm{BD}})$ of 1630 V is achieved.
机译:通过在栅电极下方插入p型GaN层,展示了增强模式(E模式)高电子迁移率晶体管(HEMT)。本文研究了工艺流程和器件结构对电性能的影响。通过通过合金温度调节在p-GaN和沟道之间形成的二极管的内置电压,我们证明了4.3 V的阈值电压(V_ {rm {th}})$。接下来,我们发现在这种HEMT结构中存在p-GaN层和2-D电子气(2DEG)通道的平行导电路径。通过去除栅-源区和栅-漏区上方的p-GaN,电流传导从p-GaN迁移到2DEG沟道。在我们的案例中,为确保稳定的正向电流-电压操作,p-GaN剩余厚度的工艺窗口估计为$ 10pm 5〜{rm nm} $。最终,在栅极接触下面的p-GaN耗尽表面泄漏电流的情况下,实现了击穿电压$(V_ {rm {BD}})为1630 V的E模式HEMT。

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