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首页> 外文期刊>IEEE Transactions on Electron Devices >An ESD-Protected, One-Time Programmable Memory Front-End Circuit for High-Voltage, Silicon-on-Insulator Technology
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An ESD-Protected, One-Time Programmable Memory Front-End Circuit for High-Voltage, Silicon-on-Insulator Technology

机译:用于高压,绝缘体技术的ESD保护的一次性可编程存储器前端电路

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摘要

An electrostatic discharge (ESD)-protected one-time-programmable (OTP) memory front-end circuit, for high-voltage (HV) applications, designed and manufactured in silicon-on-insulator (SOI) technology, is presented. The SOI technology meets HV functional-isolation and level-shifting requirements but is not suitable for advanced analog circuits. The presented OTP memory is discussed as an introduction to digital programmability in the considered technology. The memory element consists of an antifuse type structure and is implemented using a 5-V nMOS with L = 1 mu m and W = 1.2 mu m. The cell memory allows for significant area and power savings in the adopted HV technology. Conditions for this require that an efficient ESD protection will guarantee safe operation, even in the presence of a small and fragile on-chip element whose undesired burning would compromise the programming mechanism, and consequently the reliability, of the circuit. Details about the circuit design implementation of the front-end circuit for both read and write circuits and ESD protection are described with experimental results validating the proposed implementation.
机译:提出了一种静电放电(ESD) - 保护的一次性可编程(OTP)存储器前端电路,用于高压(HV)在绝缘体(SOI)技术中设计和制造的高压(HV)应用。 SOI技术符合HV功能隔离和水平换档要求,但不适用于高级模拟电路。讨论所呈现的OTP存储器作为考虑技术中的数字可编程性的介绍。存储元件由反熔丝型结构组成,并且使用具有L =1μm和w =1.2μm的5v nmos来实现。电池存储器允许采用的HV技术中的显着区域和功率节省。为此需要有效的ESD保护将保证安全运行,即使在存在的小而脆弱的片上元素,其不希望的燃烧会损害该电路的编程机构,并因此是可靠性。有关读写电路和ESD保护的前端电路的电路设计实现的细节,实验结果验证了拟议的实施。

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