机译:逻辑和RF部分的协调性硅与绝缘体平台I:植入诱导的应变松弛
Natl Univ Singapore Dept Elect & Comp Engn Singapore 117582 Singapore;
Natl Univ Singapore Dept Elect & Comp Engn Singapore 117582 Singapore;
Natl Univ Singapore Dept Elect & Comp Engn Singapore 117582 Singapore;
Natl Univ Singapore Dept Elect & Comp Engn Singapore 117582 Singapore;
Soitec F-38190 Bernin France;
Soitec F-38190 Bernin France;
Soitec F-38190 Bernin France;
STMicroelectronics F-38926 Crolles France;
STMicroelectronics F-38926 Crolles France;
STMicroelectronics F-38926 Crolles France;
Natl Univ Singapore Dept Elect & Comp Engn Singapore 117582 Singapore;
Natl Univ Singapore Dept Elect & Comp Engn Singapore 117582 Singapore;
Natl Univ Singapore Dept Elect & Comp Engn Singapore 117582 Singapore;
5G RF application; compressive-strained p-channel field-effect transistors (pFETs); ion implantation; strain relaxation in fully depleted strained silicon-on-insulator (FD-SSOI); SSOI; tensile-strained n-channel field-effect transistors (nFETs);
机译:尺寸和厚度对图案化应变绝缘体上硅局部应变弛豫的影响
机译:适用于5G时代的大规模应变式绝缘硅技术:几何形状和退火对nMOSFET的应变保持率和器件性能的影响
机译:界面反应在应变Si_(0.7)Ge_(0.3)(001)上的Hf硅酸盐薄膜中引起的应变松弛与退火温度的关系
机译:启用UTBB紧张的SOI平台,用于逻辑和RF的共同集成:植入诱导的应变松弛和梳状器件架构
机译:使用X射线衍射和会聚光束电子衍射测量应变硅的晶格应变和弛豫效应
机译:滚动循环放大平台组装的阻遏器逻辑模块以构建一组逻辑门
机译:使用会聚光束电子衍射测定应变-SiGe膜自由表面的应变弛豫