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首页> 外文期刊>IEEE Electron Device Letters >Undoped InP/InGaAs heterostructure insulated-gate FET's grown by OMVPE with PECVD-deposited SiO/sub 2/ as gate insulator
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Undoped InP/InGaAs heterostructure insulated-gate FET's grown by OMVPE with PECVD-deposited SiO/sub 2/ as gate insulator

机译:由OMVPE以PECVD沉积的SiO / sub 2 /作为栅绝缘体生长的未掺杂InP / InGaAs异质结构绝缘栅FET

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摘要

The fabrication and performance of InP/InGaAs insulated-gate FETs which use a heterojunction to isolate the channel electrons from the semiconductor-insulator interface are discussed. Plasma-enhanced chemical vapor deposition (PECVD) was used to deposit SiO/sub 2/ on InP to form the gate insulator. Since the device structure is undoped, channel electrons are accumulated by the gate-induced field across the insulator. Extrinsic transconductances of 130 mS/mm (300 K) and 210 mS/mm (77 K) were achieved for 1.5- mu m gate-length devices. Gate-drain breakdown voltages in excess of 20 V were also measured.
机译:讨论了使用异质结将沟道电子与半导体-绝缘体界面隔离的InP / InGaAs绝缘栅FET的制造和性能。等离子体增强化学气相沉积(PECVD)用于在InP上沉积SiO / sub 2 /以形成栅极绝缘体。由于器件结构是未掺杂的,沟道电子被绝缘体上的栅极感应场累积。对于1.5微米栅长器件,实现了130 mS / mm(300 K)和210 mS / mm(77 K)的非本征跨导。还测量了超过20 V的栅极-漏极击穿电压。

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