Heterojunction bipolar transistors with emitter barrier lowered by /spl delta/-doping

摘要

An npn heterojunction bipolar transistor with a Si-/spl delta/-doped layer at the emitter-base hetero-interface is demonstrated. The Si /spl delta/-doped layer reduces the potential spike at the emitter junction. This design reserves the abruptness of the heterojunction, reduces electron barrier and increases the hole barrier simultaneously. Experimental results show that the HBT's turn-on characteristics are greatly improved while the current gain remains high. The offset voltages as low as 44 mV have been obtained. Very high current gains at very low collector current densities are obtained.