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A High-Performance Single-Photon Avalanche Diode in 130-nm CMOS Imaging Technology

机译:采用130nm CMOS成像技术的高性能单光子雪崩二极管

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A single-photon avalanche diode (SPAD) is reported in a 130-nm CMOS imaging process which achieves a peak photon detection efficiency (PDE) of $approx$72% at 560 nm with $> hbox{40}%$ PDE from 410 to 760 nm. This is achieved by eliminating junction isolation, utilizing dielectric stack optimizations designed for CMOS imaging, and operating at high bias enabled by ac coupling. The 8-$muhbox{m}$-diameter device achieves a low median dark count rate of 18 Hz at 2-V excess bias $(V_{rm EB})$, a $< hbox{60}hbox{-}hbox{ps}$ FWHM timing resolution at 654 nm from $V_{rm EB} = hbox{6} hbox{V}$ to $V_{rm EB} = hbox{12} hbox{V}$, and a $< hbox{4}%$ after-pulsing probability. This represents performance which is comparable to fully customized discrete SPADs.
机译:据报道,在130 nm CMOS成像工艺中,单光子雪崩二极管(SPAD)在560 nm处实现了约72%的峰值光子检测效率(PDE),其中,hbox {40}%$ PDE从410降低到440%。 760海里这是通过消除结隔离,利用专为CMOS成像设计的介电叠层优化并通过交流耦合实现高偏置而实现的。直径为8- $ muhbox {m} $的设备在2-V过量偏置$(V_ {rm EB})$时,可实现低中位数暗计数率18 Hz,而$

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