Design & Implementation of 8 Bit Galois Encoder for on FPGA Secure Data Transmission

摘要

Galois Field Theory deals with numbers that are binary in nature, have the properties of a mathematical “field,” and are finite in scope. Galois operations comprises of Addition, multiplication and logarithms[1]. Galois Field multipliers have been used for coding theory and for cryptography [9]. Both areas are complex, with similar needs, and both deal with fixed symbolic alphabets that neatly fit the extended Galois Field model. The use of FPGA Spartan XC3S400-4PQG208C in this area is new, but their utilization is intriguing for their security capabilities as well as for their performance and power characteristics. In addition, the nonvolatility of FPGA is useful for polynomial and key storage within devices, and Spartan XC3S400-4PQG208C, particularly, provide multiple security features In this paper we present GF (2m) Galois field encoder its verification on FPGA Spartan XC3S400-4PQG208C using the National Institute Standard & Technology(NIST) chosen irreducible polynomial. A complete verification of multiplication is simulated on ModelSim 10.0 a & implemented on FPGA Spartan 3 will be presented to assure its validity .