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首页> 外文期刊>Indian Journal of Science and Technology >Low Complexity Digit Serial Multiplier for Finite Field using Redundant Basis
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Low Complexity Digit Serial Multiplier for Finite Field using Redundant Basis

机译:使用冗余基的有限域低复杂度数字串行乘法器

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摘要

Cryptography has been increasingly used due to its rapid trends. In recent days, it has been used mostly in communication and in financial transactions through automated machines or internet. The applications of cryptography and coding theory require finite field operations and are realized based on the finite field computations. In this paper efficient digit-serial multiplier over finite field is implemented and is obtained by using Redundant Basis (RB), intend to present highthroughput multiplier. Area and power are the two factors which obtain less when compared to the previous multipliers. The digit-serial multiplier for 32-bit is implemented using Verilog HDL and synthesized to know its better performance in terms of area and power compared to previous multipliers.
机译:由于其快速发展的趋势,密码学已被越来越多地使用。近年来,它已广泛用于通过自动机器或互联网进行的通信和金融交易中。密码学和编码理论的应用需要有限域运算,并基于有限域计算来实现。本文实现了一种有效的有限域数字串行乘法器,它是通过使用冗余基(RB)获得的,目的是提出高通量乘法器。与以前的乘数相比,面积和功率是获得较少的两个因素。使用Verilog HDL实现了32位的数字串行乘法器,并对其进行了合成,以了解与以前的乘法器相比,其在面积和功耗方面的更好性能。

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