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首页> 外文期刊>Defence science journal >Dry Etching of GaAs to Fabricate Via-Hole Grounds in Monolithic Microwave Integrated Circuits
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Dry Etching of GaAs to Fabricate Via-Hole Grounds in Monolithic Microwave Integrated Circuits

机译:GaAs的干法刻蚀以制造单片微波集成电路中的通孔接地

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This study investigates the dry etching of 60 mm dia, 200 mm deep holes for fabrication of through substrate via holes for grounding monolithic microwave integrated circuits (MMICs), on 3-inch dia semiinsulating GaAs wafer using RIE and ICP processes with CFC and non-CFC gas chemistry, respectively. The effect of various process parameters on GaAs etch rate and resultant etch profile was investigated. Two kinds of masks, photoresist and Ni, were used to etch GaAs and performance was compared by investigating effect on etch rate, etch depth, etch profile, and surface morphology. The etch profile, etch depth, and surface morphology of as-etched samples were characterised by scanning electron microscopy. The desired 200 mm deep strawberry profile was obtained at 40 mTorr for both RIE and ICP processes with an etch rate of ~1.3 mm/min and ~4 mm/min respectively. Ni metal mask was used for RIE process due to poor photoresist selectivity, whereas ICP process utilised photoresist as mask. The vias were then metallised by depositing a thin seed layer of Ti/Au (1000 ?) using radio frequency sputtering and Au (~5 mm) electroplated to connect the frontside pad and back side ground plane. The typical parasitic inductance offered by these via for RIE and ICP?processes was ~76 pH and 83 pH respectively, which is well within the acceptable limits. The developed process was finally integrated to in-house MMIC production line. Defence Science Journal, 2009,?59(4), pp.363-370 ,?DOI:http://dx.doi.org/10.14429/dsj.59.1535
机译:这项研究研究了使用RIE和ICP工艺以及CFC和非CFC技术在3英寸直径半绝缘GaAs晶圆上干法刻蚀60毫米直径,200毫米深的孔,以制造用于将单片微波集成电路(MMIC)接地的通孔。分别使用CFC气体化学。研究了各种工艺参数对GaAs蚀刻速率和所得蚀刻轮廓的影响。使用两种掩膜(光刻胶和镍)蚀刻GaAs,并通过研究其对蚀刻速率,蚀刻深度,蚀刻轮廓和表面形态的影响来比较性能。通过扫描电子显微镜表征所蚀刻样品的蚀刻轮廓,蚀刻深度和表面形态。对于RIE和ICP工艺,在40 mTorr时均获得了所需的200 mm深草莓轮廓,蚀刻速率分别为〜1.3 mm / min和〜4 mm / min。由于光致抗蚀剂选择性差,因此将镍金属掩模用于RIE工艺,而ICP工艺则将光致抗蚀剂用作掩模。然后,通过使用射频溅射沉积Ti / Au(1000?)的薄籽晶层和电镀Au(〜5 mm)以连接正面焊盘和背面接地层,对通孔进行金属化。这些通孔对于RIE和ICP?工艺提供的典型寄生电感分别为〜76 pH和83 pH,这完全在可接受的范围内。最终将开发的过程集成到内部MMIC生产线中。国防科学杂志,2009,59(4),363-370页,DOI:http://dx.doi.org/10.14429/dsj.59.1535

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