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首页> 外文期刊>IEEE Transactions on Consumer Electronics >Hierarchical motion estimation algorithms with especially low hardware costs
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Hierarchical motion estimation algorithms with especially low hardware costs

机译:硬件成本特别低的分层运动估计算法

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The digital signal processor (DSP) or video signal processor (VSP) is becoming a popular solution for video encoding because of its flexibility compared with the special purpose chip. The less hardware costs an algorithm requires, the better the algorithm is. The computational complexity, on-chip memory size requirement, the amount of data fetch and the data fetch times are used as the measurement of the encoding algorithms performance. Considering that, a large-scale-subsample (4:1 horizontally and vertically subsampling) hierarchical motion estimation algorithm (LSS-HME) is proposed. It can be implemented with less hardware resources. In order to improve the estimation performance the relativity of the motion vector field is exploited. The peak signal-to-noise ratio (PSNR) degradation of the reconstructed image is limited to about 0.1 dB compared with the full search (FS) algorithm. By using the simple motion estimation algorithm described, MPEG-2 MP@ML or even higher layers can be implemented on the mainstream video signal processor with quite good performance.
机译:由于数字信号处理器(DSP)或视频信号处理器(VSP)与专用芯片相比具有灵活性,因此正成为视频编码的流行解决方案。算法所需的硬件成本越少,算法就越好。计算复杂度,片上存储器大小要求,数据获取量和数据获取时间用作编码算法性能的度量。考虑到这一点,提出了一种大规模子样本(水平和垂直子样本为4:1)分层运动估计算法(LSS-HME)。它可以用更少的硬件资源来实现。为了提高估计性能,利用了运动矢量场的相对性。与全搜索(FS)算法相比,重建图像的峰值信噪比(PSNR)降级限制在约0.1 dB。通过使用所述的简单运动估计算法,可以在主流视频信号处理器上以相当好的性能实现MPEG-2 MP @ ML甚至更高的层。

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