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A fast and accurate method for determining a lower bound on execution time

机译:确定执行时间下限的快速准确的方法

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摘要

In performance critical applications, memory latency is frequently the dominant overhead. In many cases, automatic compiler-based optimizations to improve memory performance are limited and programmers frequently resort to manual optimization techniques. However, this process is tedious and time-consuming. Furthermore, as the potential benefit from optimization is unknown there is no way to judge the amount of effort worth expending, nor when the process can stop, i.e. when optimal memory performance has been achieved or sufficiently approached. Architecture simulators can provide such information but designing an accurate model of an existing architecture is difficult and simulation times are excessively long. In this article, we propose and implement a technique that is both fast and reasonably accurate for estimating a lower bound on execution time for scientific applications. This technique has been tested on a wide range of programs from the SPEC benchmark suite and two commercial applications, where it has been used to guide a manual optimization process and iterative compilation. We compare our technique with that of a simulator with an ideal memory behaviour and demonstrate that our technique provides comparable information on memory performance and yet is over two orders of magnitude faster. We further show that our technique is considerably more accurate than hardware counters.
机译:在性能至关重要的应用程序中,内存延迟通常是主要的开销。在许多情况下,用于提高内存性能的基于编译器的自动优化是有限的,程序员经常求助于手动优化技术。但是,此过程繁琐且耗时。此外,由于优化的潜在好处是未知的,所以没有办法判断值得花费的精力,也没有办法确定过程何时可以停止,即何时达到或充分达到了最佳存储性能。架构仿真器可以提供此类信息,但是设计现有架构的准确模型非常困难,并且仿真时间过长。在本文中,我们提出并实现了一种快速且合理准确的技术,用于估算科学应用程序的执行时间下限。该技术已经在SPEC基准套件和两个商业应用程序的广泛程序中进行了测试,并已用于指导手动优化过程和迭代编译。我们将我们的技术与具有理想内存行为的模拟器的技术进行了比较,并证明了我们的技术可以提供有关内存性能的可比信息,但速度要快两个数量级。我们进一步证明,我们的技术比硬件计数器要准确得多。

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