Small Constant Mean-Error Imprecise Adder/Multiplier for Efficient VLSI Implementation of MAC-Based Applications

摘要

Due to considerable effectiveness of the imprecise computing paradigm in hardware implementation of many applications, great attention has been recently paid by many research groups to develop different novel imprecise computational blocks such as adders and multipliers. Traditionally, the imprecise blocks are developed in an application independent manner, just similar to development of a conventional precise block. This article investigates the systematic application oriented development of the imprecise computational blocks which results in more customized components. The main focus is on the development of customized imprecise adder/multiplier for efficient implementation of a general multiply-accumulate (MAC) block as the basic building block of many imprecision tolerant applications including digital signal processing and soft computing. To develop some customized blocks for the MAC, the error behaviors of the suitable imprecise adder and multiplier are first extracted by analyzing the MAC. Based on analysis results, efficient small constant mean-error imprecise adder and multiplier are developed based on a systematic mathematical-logical approach. A wide range of synthesis and simulation results are provided to demonstrate efficiency of custom developed imprecise blocks with respect to some of the best existing imprecise blocks in a general MAC and a real 2D-Convolution application.