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The MAFT architecture for distributed fault tolerance

机译:用于分布式容错的MAFT体系结构

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A description is given of the multicomputer architecture for fault tolerance (MAFT), a distributed system designed to provide extremely reliable computation in real-time control systems. MAFT is based on the physical and functional partitioning of executive functions from applications functions. The implementation of the executive functions in a special-purpose hardware processor allows the fault-tolerance functions to be transparent to the application programs and minimizes overhead. Byzantine agreement and approximate agreement algorithms are used for critical system parameters. MAFT supports the use of multiversion hardware and software to tolerate built-in or generic faults. Graceful degradation and restoration of the application workload is permitted in response to the exclusion and readmission of nodes, respectively.
机译:给出了用于容错(MAFT)的多计算机体系结构的说明,该体系结构旨在在实时控制系统中提供极其可靠的计算。 MAFT基于执行功能与应用程序功能的物理和功能划分。专用硬件处理器中执行功能的实现允许容错功能对应用程序透明,并使开销最小化。关键系统参数使用拜占庭协议和近似协议算法。 MAFT支持使用多版本硬件和软件来容忍内置或通用故障。分别响应于节点的排除和重新允许,允许应用程序工作负载的正常降级和恢复。

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