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Measuring cache and TLB performance and their effect on benchmark runtimes

机译:测量缓存和TLB性能及其对基准运行时的影响

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In previous research, we have developed and presented a model for measuring machines and analyzing programs, and for accurately predicting the running time of any analyzed program on any measured machine. That work is extended here by: (1) developing a high level program to measure the design and performance of the cache and TLB units; (2) using those measurements, along with published miss ratio data, to improve the accuracy of our runtime predictions; (3) using our analysis tools and measurements to study and compare the design of several machines, with particular reference to their cache and TLB performance. As part of this work, we describe the design and performance of the cache and TLB for ten machines. The work presented, in this paper extends a powerful technique for the evaluation and analysis of both computer systems and their workloads; this methodology is valuable both to computer users and computer system designers.
机译:在先前的研究中,我们已经开发并提出了一种模型,用于测量机器和分析程序,并准确预测任何被测量机器上任何被分析程序的运行时间。通过以下方式扩展了这项工作:(1)开发一个高级程序以测量缓存和TLB单元的设计和性能; (2)使用这些测量值以及已发布的未命中率数据来提高我们的运行时预测的准确性; (3)使用我们的分析工具和度量来研究和比较多台计算机的设计,尤其要参考它们的缓存和TLB性能。作为这项工作的一部分,我们描述了十台计算机的缓存和TLB的设计和性能。本文介绍的工作扩展了一种强大的技术,可以对计算机系统及其工作负载进行评估和分析。这种方法对于计算机用户和计算机系统设计人员都非常有价值。

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