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An Embedded Memory-Centric Reconfigurable Hardware Accelerator for Security Applications

机译:适用于安全应用的嵌入式以存储器为中心的可重配置硬件加速器

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摘要

Security has emerged as a critical need in today's computer applications. Unfortunately, most security algorithms are computationally expensive and often do not map efficiently to general purpose processors. Fixed-function accelerators offer significant improvement in energy-efficiency, but they do not allow more than one application to reuse hardware resources. Mapping applications to generic reconfigurable fabrics can achieve the desired flexibility, but at the cost of area and energy efficiency. This paper presents a novel reconfigurable framework, referred to as hardware accelerator for security kernel (HASK), for accelerating a wide array of security applications. This framework incorporates a coarse-grained datapath, supports for lookup functions, and flexible interconnect optimizations, which enable on-demand pipelining and parallel computations in multiple ultralight-weight processing elements. These features are highly effective for energy-efficient operation in a diverse set of security applications. Through simulations, we have compared the performance of HASK to software and field programmable gate array (FPGA) platforms. Simulation results for a set of six common security applications show comparable latency between HASK and FPGA with 2.5X improvement in energy-delay product and 4X improvement in iso-area throughput. HASK also shows 5X improvement in iso-area throughput and 45X improvement in energy-delay product compared to optimized software implementations.
机译:安全性已成为当今计算机应用程序中的一项关键需求。不幸的是,大多数安全算法在计算上是昂贵的,并且常常不能有效地映射到通用处理器。固定功能加速器显着提高了能源效率,但是它们不允许多个应用程序重用硬件资源。将应用程序映射到通用的可重构结构可以实现所需的灵活性,但是会以面积和能源效率为代价。本文提出了一种新颖的可重新配置框架,称为安全内核硬件加速器(HASK),用于加速各种安全应用程序。该框架结合了粗粒度的数据路径,对查找功能的支持以及灵活的互连优化,从而可以在多个超轻量级处理元素中实现按需流水线化和并行计算。这些功能对于各种安全应用程序中的节能操作非常有效。通过仿真,我们将HASK的性能与软件和现场可编程门阵列(FPGA)平台进行了比较。一组六个常见安全应用程序的仿真结果表明,HASK和FPGA之间的延迟相当,能量延迟产品提高了2.5倍,等面积吞吐量提高了4倍。与优化的软件实现相比,HASK还显示出等面积吞吐量提高了5倍,能源延迟产品提高了45倍。

著录项

  • 来源
    《IEEE Transactions on Computers》 |2016年第10期|3196-3202|共7页
  • 作者单位

    Department of Electrical Engineering and Computer Science, Case Western Reserve University, Cleveland, OH;

    Department of Electrical Engineering and Computer Science, Case Western Reserve University, Cleveland, OH;

    Intel Labs, Intel Corporation, Hillsboro, Hillsboro, OR;

    Department of Electrical Engineering and Computer Science, Case Western Reserve University, Cleveland, OH;

    Department of Electrical Engineering and Computer Science, Case Western Reserve University, Cleveland, OH;

  • 收录信息
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    Security; Hardware; Program processors; Kernel; Acceleration; Arrays;

    机译:安全性;硬件;程序处理器;内核;加速;阵列;

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