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Extending Real-Time Analysis for Wormhole NoCs

机译:扩展虫孔NoC的实时分析

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摘要

The delay upper-bound analysis problem is of fundamental importance to real-time applications in Network-on-Chips (NoCs). In the paper, we revisit two state-of-the-art analysis models for real-time communication in wormhole NoCs with priority-based preemptive arbitration and show that the models only support specific router architectures with large buffer sizes. We then propose an extended analysis model to estimate delay upper-bounds for all router architectures and buffer sizes by identifying and analyzing the differences between upstream and downstream indirect interferences according to the relative positions of traffic flows and taking the buffer influence into consideration. Simulated evaluations show that our model supports one more router architecture and applies to small buffer sizes compared to the previous models.
机译:延迟上限分析问题对于片上网络(NoC)中​​的实时应用至关重要。在本文中,我们通过基于优先级的抢占式仲裁回顾了两个最新的分析模型,用于蠕虫NoC中的实时通信,并显示了这些模型仅支持具有较大缓冲区大小的特定路由器体系结构。然后,我们提出一个扩展的分析模型,通过根据业务流的相对位置识别和分析上游和下游间接干扰之间的差异,并考虑缓冲区的影响,来估计所有路由器体系结构和缓冲区大小的延迟上限。仿真评估表明,与以前的模型相比,我们的模型还支持一种路由器体系结构,并且适用于较小的缓冲区。

著录项

  • 来源
    《IEEE Transactions on Computers》 |2017年第9期|1532-1546|共15页
  • 作者单位

    Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan, China;

    Wuhan National Laboratory for Optoelectronics and the Key Laboratory of Data Storage System, Ministry of Education of China, Huazhong University of Science and Technology, Wuhan, China;

    School of Information and Communication Technology, KTH Royal Institute of Technology, Stockholm, Sweden;

    Wuhan National Laboratory for Optoelectronics and the Key Laboratory of Data Storage System, Ministry of Education of China, Huazhong University of Science and Technology, Wuhan, China;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    Delays; Real-time systems; Analytical models; Computational modeling; Calculus; Computer architecture; Interference;

    机译:延迟;实时系统;分析模型;计算模型;微积分;计算机体系结构;干扰;

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