Highly Reliable and Manufacturable Ultrafine Pitch Cu–Cu Interconnections for Chip-Last Embedding With Chip-First Benefits

摘要

Flip-chip packaging of Ultrafine pitch integrated circuits aggravates the stress–strain concerns as the interconnection pitch is decreased, requiring a fundamentally different system approach to interconnections, underfill processes and interfaces, and the substrate. This paper demonstrates an innovative and manufacturable solution to achieve excellent reliability at Ultrafine pitch $({sim}{rm 30}~mu{rm m})$ using direct copper–copper (Cu–Cu) interconnections with adhesives. A number of 30-$mu{rm m}$ bump pitch test vehicles (TVs) were designed with 3 mm $times,$ 3 mm chips to extract both daisy chain resistance and single-bump resistance data. Assembled bump resistivity was found to be ${sim}{rm 3}hbox{--}4times$ lower than most solders. Performance of these TVs was studied for high temperature storage (HTS) life test, unbiased-highly accelerated stress test (U-HAST) and thermal cycling test (TCT). Test results showed that the assemblies with this next generation interconnection technology depicted excellent reliability results in HTS, U-HAST, and TCT tests. Based on these results, it is concluded that adhesive materials, provide unique opportunities for Ultrafine pitch and high performance interconnections.