Enhancement of Via Integrity in High-Tg Multilayer Printed Wiring Boards

摘要

High-Tg (glass transition temperature) laminates based on multifunctional epoxy are now becoming mainstream in the fabrication of multilayer printed wiring boards due to their inherent properties of better dimensional stability, low coefficient of thermal expansion, and multiple soldering and rework capability. However, high-Tg laminates have more chemical resistance, and hence it is difficult to modify the surface topography. This results in low copper adhesion along the hole wall barrel which can lead to critical defects like hole wall pull away and therefore, high-Tg laminates fail the basic requirements for through hole technology in printed wiring boards, that is, high bond strength and ability to withstand multiple solder float test. The popular methods to modify the surface topography of the drilled holes in low-Tg laminates before the metallization process are either plasma ablation or swell-etch method. Based on the success of these methods on low-Tg laminates, an experiment was carried out on high-Tg laminates. It was observed that plasma ablation or swell-etch method alone cannot generate the required topography on high-Tg laminates. This calls for the fine-tuning of the existing processes. In this paper, the combined effect of plasma ablation (a dry process) and swell-etch method (a wet chemical process) to alter the surface topography of high-Tg laminate is studied. It is observed from the experiment that plated through holes of high-Tg laminate processed in this way has higher bond strength and can withstand $6times$ solder dip test without hole wall pull away. Enhanced bond strength of deposited copper along the hole wall barrel is attributed to the mechanical interlocking of plated copper inside the microroughened dielectric surface and highly reliable three-point contact between plated copper and projected inner layer copper.