首页> 外文期刊>Circuits, systems, and signal processing >FPGA-Implementation of Parallel and Sequential Architectures for Adaptive Noise Cancelation
【24h】

FPGA-Implementation of Parallel and Sequential Architectures for Adaptive Noise Cancelation

机译:自适应和噪声消除的并行和顺序架构的FPGA实现

获取原文
获取原文并翻译 | 示例

摘要

This paper presents a FPGA-based rapid prototyping of an adaptive noise canceller (ANC) using XUP Virtex-Ⅱ Pro development board and Xilinx System Generator. New parallel and sequential architectures of the ANC are proposed and successfully applied to remove noise from electrocardiogram and speech signals. The pipelined architecture were evaluated and compared to existing high-speed systems using objective measurement tests. By providing comparable filtering performances that of the parallel architectures, the proposed sequential system required fewer material resources.
机译:本文介绍了使用XUPVirtex-ⅡPro开发板和Xilinx System Generator开发的基于FPGA的自适应噪声消除器(ANC)的快速原型。提出了ANC的新的并行和顺序架构,并成功应用于消除心电图和语音信号中的噪声。对流水线架构进行了评估,并使用客观测量测试将其与现有的高速系统进行了比较。通过提供与并行体系结构相当的过滤性能,建议的顺序系统需要更少的材料资源。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号