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1 V Rectifier Based on Bulk-Driven Quasi-Floating-Gate Differential Difference Amplifiers

机译:基于批量驱动准浮栅差分放大器的1 V整流器

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摘要

This paper presents experimental results for a low-voltage (LV) low-power (LP) voltage rectifier realization, employing two differential difference amplifiers (DDA) as active elements.The proposed DDA is based on the recently presented technique named bulk-driven quasi-floating-gate that enables the circuit to work with 1 V power supply voltage, threshold-to-supply ( / ratio and modulation index factor equal to 70 and 90 %, respectively. The competitive features of the proposed structure compared with other state-of-the-art circuits are the capability for working under LV supply, with extended common mode voltage range and improved input transconductance. The proposed circuit was designed, simulated, and fabricated employing the Cadence platform and MOS transistors models provided by the 0.35 m CMOS AMIS process. The total chip area was 213 266 . The provided simulation and experimental results prove the attractive performances of the proposed rectifier topology.
机译:本文介绍了使用两个差分差动放大器(DDA)作为有源元件的低压(LV)低功率(LP)电压整流器实现的实验结果。提出的DDA基于最近提出的称为体驱动准晶体管的技术-浮栅,使电路能够在1 V电源电压,阈值电源(/比率和调制指数因子分别等于70和90%)下工作。与其他状态相比,该结构的竞争特征-最先进的电路具有在低压电源下工作的能力,具有扩展的共模电压范围和改进的输入跨导能力,该电路采用Cadence平台和0.35 m CMOS提供的MOS晶体管模型进行设计,仿真和制造AMIS工艺,芯片总面积为213266,所提供的仿真和实验结果证明了所提出的整流器拓扑的诱人性能。

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