An Efficient Architecture for QRS Detection in FPGA Using Integer Haar Wavelet Transform

摘要

In the past years, several QRS complex (Q, R and S wave) detecting algorithms have been implemented in software, but they are not applicable for real-time operation due to their mathematical complexity. Hence, this paper focuses on developing an algorithm which enables detection of QRS complex in real time. Here, Integer Haar Wavelet Transform is employed which is used for the purpose of filtering ECG signal and detecting the R-peak frequency of QRS complex. Various blocks of the proposed architecture are implemented in a Digilent Nexys 4 double data rate field-programmable gate array board with only 501 flip-flops and 557 look-up tables utilized which makes it suitable for directly installing it into medical equipment or further developing a smart internet of things system for bio-medical applications. To make the designed system more generic, several similar blocks or components have been used. At first, the principle of using wavelet to detect QRS complex is explored theoretically and accordingly used for developing our system. An efficient hardware architecture is implemented incorporating many simplifications, a significant one being approximation of floating point arithmetic to integer arithmetic, required for wavelets. The architecture of the designed system is represented with demonstration in behavioral simulation as well as hardware testing. In the end, the system is analyzed and results are obtained with an error percentage in RR interval computation of less than 1.4% and QRS detection accuracy of 98.76%. The proposed architecture is also synthesized using 130 nm technology which produces 0.717% of leakage power. The developed architecture can be used for analysis of other bio-medical signals where the operation of wavelet transform in hardware is required.