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Hardware Optimized FPGA Implementations of High-Speed True Random Bit Generators Based on Switching-Type Chaotic Oscillators

机译:基于开关型混沌振荡器的高速真随机位发生器的硬件优化FPGA实现

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One of the important applications of chaotic oscillators is their employment as sources of entropy for True Random Bit Generators (TRBGs). In this work, we introduce high-speed TRBGs realized on a modular Field Programmable Gate Array (FPGA) hardware platform using two different switching-type chaotic oscillators. While both oscillators are autonomous, one is 3-D and the other is 4-D. This enables us to investigate and compare the advantages/disadvantages of higher dimensional chaotic oscillators on the throughput, hardware requirements and security of the generated bit-streams. For that purpose, two different implementations are described for each TRBG; a throughput-optimized architecture and a resource-optimized architecture that utilizes fewer FPGA blocks. In both cases, high speed is achieved by concatenating all state-space variables of each chaos generator into one variable. Furthermore, a new postprocessing method that enables the generated bit-streams to pass all NIST 800.22 statistical tests is introduced. Experimental results show that the throughput-optimized TRBG architecture, based on the 4-D system, can exceed 1882 Mbit/s. However, the resource-optimized TRBG architecture, based on the 3-D system, is the best in terms of FPGA resources and overall Figure of Merit.
机译:混沌振荡器的重要应用之一是将其用作真随机位发生器(TRBG)的熵源。在这项工作中,我们介绍了使用两个不同的开关型混沌振荡器在模块化现场可编程门阵列(FPGA)硬件平台上实现的高速TRBG。两个振荡器都是自治的,一个是3-D,另一个是4-D。这使我们能够研究和比较高维混沌振荡器在吞吐量,硬件要求和所生成比特流的安全性方面的优缺点。为此,为每个TRBG描述了两种不同的实现方式。使用更少的FPGA模块的吞吐量优化架构和资源优化架构。在这两种情况下,通过将每个混沌生成器的所有状态空间变量串联到一个变量中来实现高速。此外,引入了一种新的后处理方法,该方法可使生成的位流通过所有NIST 800.22统计测试。实验结果表明,基于4D系统的吞吐量优化的TRBG架构可以超过1882 Mbit / s。但是,就FPGA资源和总体功绩而言,基于3-D系统的资源优化TRBG架构是最好的。

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