Coupling effects on wire delay. Challenges in deep submicron VLSI design

摘要

Coupling is a complex phenomenon, especially where the high-gain coupling effect is concerned. To introduce coupling effects on wire delay, including the high-gain coupling effect, this article presents a generalization of a study that evolved from a real VLSI design. Possible solutions to coupling effects such as CAD tools, circuit design methodology, and circuit design techniques are also discussed. The conclusions and results presented in this article are based on current complementary metal oxide semiconductor (CMOS) technologies.