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Positive feedback technique and split-length transistors for DC-gain enhancement of two-stage op-amps

机译:正反馈技术和分长晶体管,用于增强两级运算放大器的直流增益

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This study presents the design and simulation of a fully differential two-stage op-amp in a 0.18 μm complementary metal-oxide-semiconductor process with a 1.8 V supply voltage. In this op-amp, positive feedback technique and split-length transistors (SLTs) are employed to increase the DC-gain of the op-amp by about 22 dB without affecting the unity-gain bandwidth (UGBW), stability, power dissipation and output voltage swing of the conventional two-stage op-amp. A comprehensive analysis is provided for differential-mode gain, common-mode gain, power supply rejection ratio, input-referred noise, input offset, frequency response and the effect of using SLTs on DC-gain sensitivity. The proposed op-amp is utilised in a flip-around sample-and-hold amplifier (SHA). The output spectrum of the SHA shows the total harmonic distortion of 0.0023%. The post-layout and Monte Carlo simulation results show that the proposed op-amp has better performance than the state-of-the-art designs.
机译:这项研究提出了在电源电压为1.8 V的0.18μm互补金属氧化物半导体工艺中的全差分两级运算放大器的设计和仿真。在此运算放大器中,采用正反馈技术和分长晶体管(SLT)将运算放大器的DC增益提高约22 dB,而不会影响单位增益带宽(UGBW),稳定性,功耗和常规两级运算放大器的输出电压摆幅。针对差模增益,共模增益,电源抑制比,输入参考噪声,输入失调,频率响应以及使用SLT对DC增益灵敏度的影响提供了全面的分析。拟议的运算放大器用于翻转式采样保持放大器(SHA)。 SHA的输出频谱显示总谐波失真为0.0023%。布局后和蒙特卡洛仿真结果表明,所提出的运算放大器具有比最新设计更好的性能。

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