A CMOS buffer without short-circuit power consumption

摘要

A new CMOS buffer without short-circuit power consumption isnproposed. The gate-driving signal of the output pull-up (pull-down)ntransistor is fed back to the output pull-down (pull-up) transistor tonget tri-state output momentarily, eliminating the short-circuit powernconsumption, The HSPICE simulation results verified the operation of thenproposed buffer and showed the power-delay product is about 15% smallernthan conventional tapered CMOS buffer