Modified vector rotational CORDIC (MVR-CORDIC) algorithm andarchitecture

摘要

The CORDIC algorithm is a well-known iterative method for thencomputation of vector rotation. However, the major disadvantage is itsnrelatively slow computational speed. For applications that requirenforward rotation (or vector rotation) only, we propose a new scheme, thenmodified vector rotational CORDIC (MVR-CORDIC) algorithm, to improve thenspeed performance of CORDIC algorithm. The basic idea of the proposednscheme is to reduce the iteration number directly while maintaining thenSQNR performance. This can be achieved by modifying the basicnmicrorotation procedure of CORDIC algorithm. Meanwhile, three searchingnalgorithms are suggested to find the corresponding directional andnrotational sequences so as to obtain the best SQNR performance. ThreenSQNR performance refinement schemes are also suggested in this paper.nNamely, the selective prerotation scheme, selective scaling scheme, andniteration-tradeoff scheme. They can reduce and balance the quantizationnerrors encountered in both microrotation and scaling phases so as tonfurther improve the overall SQNR performance. Then, by combining thesenthree refinement schemes, we provide a systematic design flow as well asnthe optimization procedure in the application of MVR-CORDIC algorithm.nFinally, we present two VLSI architectures for the MVR-CORDIC algorithm.nIt shows that by using the proposed MVR-CORDIC algorithm, we can saven50% execution time in the iterative CORDIC structure, or 50% hardwarencomplexity in the parallel CORDIC structure compared with thenconventional CORDIC scheme