A Power-Efficient Tunable Narrow-Band Digital Front End for Bandpass Sigma–Delta ADCs in Digital FM Receivers

摘要

A power-efficient narrow-band tunable digital front end (DFE) for bandpass sigma–delta $(SigmaDelta)$ analog-to-digital converters is presented. The proposed architecture introduces a new system topology, splitting the down converter into two mixers and placing a cascaded integrator-comb decimation stage between the two mixers. The first mixer is a quadrature mixer that works at a quarter of the sampling frequency. It is followed by a complex mixer with a tunable frequency. The $SigmaDelta$ modulator and the DFE are digitally controlled. The proposed architecture is first analyzed on the system level and then synthesized in a 130-nm CMOS technology. A reduction in the power consumption of about 50% has been achieved by the proposed architecture when compared with the conventional approach.