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A Fast-Transient Low-Dropout Regulator With Load-Tracking Impedance Adjustment and Loop-Gain Boosting Technique

机译:具有负载跟踪阻抗调节和环路增益提升技术的快速瞬态低压降稳压器

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A low-voltage fast-transient low dropout (LDO) regulator compensated by an off-chip, low-equivalent-series-resistance (ESR), nanorange output capacitor is reported in this brief. The proposed load-tracking impedance adjustment and the loop-gain boosting technique make the proposed LDO regulator have fast response and small voltage spikes. The circuit is implemented by a commercial 0.35- $muhbox{m}$ CMOS technology. The chip area is 0.032 $ hbox{mm}^{2}$. The supply voltage ranges from 1.5 to 3 V. The regulated voltage is 1.2 V to provide 0–100 mA. The quiescent current in the no-load condition is 26 $mu hbox{A}$. A 100-nF low-ESR capacitor is sufficient to stabilize the proposed LDO regulator. The measured voltage spike is 44.9 mV only, and the response time is less than 0.2 $ muhbox{s}$.
机译:本文简要介绍了一种低电压快速瞬态低压降(LDO)稳压器,该稳压器由片外低等效串联电阻(ESR)纳米范围输出电容器补偿。所提出的负载跟踪阻抗调整和环路增益提升技术使所提出的LDO稳压器具有快速响应和较小的电压尖峰。该电路由商业的0.35-muhbox {m} $ CMOS技术实现。芯片面积为0.032 $ hbox {mm} ^ {2} $。电源电压范围为1.5至3V。稳定电压为1.2 V,以提供0-100 mA的电流。空载条件下的静态电流为26 $ mu hbox {A} $。一个100nF的低ESR电容器足以稳定所提出的LDO稳压器。测得的电压尖峰仅为44.9 mV,响应时间小于0.2 $ muhbox {s} $。

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